3D-TrIM: A Memory-Efficient Spatial Computing Architecture for Convolution Workloads

Cristian Sestito, Ahmed J. Abdelmaksoud, Shady O. Agwa, T. Prodromakis

arXiv.org, 2025

A Hybrid Edge Classifier: Combining TinyML-Optimised CNN with RRAM-CMOS ACAM for Energy-Efficient Inference

Kieran Woodward, E. Kanjo, G. Papandroulidakis, Shady O. Agwa, T. Prodromakis

arXiv.org, 2025

L-Sort: On-chip Spike Sorting with Efficient Median-of-Median Detection and Localization-based Clustering

Yuntao Han, Yihan Pan, Xiongfei Jiang, Cristian Sestito, Shady O. Agwa, T. Prodromakis, Shiwei Wang

2025

A 9T4R RRAM-Based ACAM for Analogue Template Matching at the Edge

G. Papandroulidakis, Shady O. Agwa, Ahmet Cirakoglu, Themistoklis Prodromakis

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2024

An Energy-Efficient Capacitive-RRAM Content Addressable Memory

Yihan Pan, A. Wheeldon, Mohammed Mughal, Shady O. Agwa, T. Prodromakis, A. Serb

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2024

DiP: A Scalable, Energy-Efficient Systolic Array for Matrix Multiplication Acceleration

Ahmed J. Abdelmaksoud, Shady O. Agwa, T. Prodromakis

arXiv.org, 2024

PyT-NeuroPack: A Hybrid PyTorch/Memristor-Crossbar Simulation Tool for Convolutional Neural Networks

Cristian Sestito, Weijie Huang, Shady O. Agwa, T. Prodromakis

IEEE International New Circuits and Systems Conference, 2024

TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation

Cristian Sestito, Shady O. Agwa, T. Prodromakis

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2024

TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Dataflow and Analytical Modelling

Cristian Sestito, Shady O. Agwa, T. Prodromakis

2024

A 1T1R+2T Analog Content-Addressable Memory Pixel for Online Template Matching

Shady O. Agwa, G. Papandroulidakis, T. Prodromakis

International Symposium on Circuits and Systems, 2023

Bent-Pyramid: Towards A Quasi-Stochastic Data Representation for AI Hardware

Shady O. Agwa, T. Prodromakis

IEEE International New Circuits and Systems Conference, 2023

CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Ting-Jung Chang, Ang Li, Fei Gao, T. Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, C. Batten, D. Wentzlaff

IEEE Custom Integrated Circuits Conference, 2023

CIFER: A Cache-Coherent 12-nm 16-mm2 SoC With Four 64-Bit RISC-V Application Cores, 18 32-Bit RISC-V Compute Cores, and a 1541 LUT6/mm2 Synthesizable eFPGA

Ang Li, Ting-Jung Chang, Fei Gao, T. Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady O. Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, C. Batten, D. Wentzlaff

IEEE Solid-State Circuits Letters, 2023

Digital in-memory stochastic computing architecture for vector-matrix multiplication

Shady O. Agwa, T. Prodromakis

Frontiers in Nanotechnology, 2023

EVE: Ephemeral Vector Engines

Khalid Al-Hawaj, T. Ta, Nick Cebry, Shady Agwa, O. Afuye, Eric Hall, Courtney Golden, A. Apsel, C. Batten

International Symposium on High-Performance Computer Architecture, 2023

, 22-Core SoC with a 1541 LUT 6 / mm 2 , 1 . 92 MOPS / LUT , Fully Synthesizable , Cache-Coherent , Embedded FPGA

Ting-Jung Chang, Ang Li, Fei Gao, T. Ta, Georgios, Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng, Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo, Orenes-Vera, Shady O. Agwa, Xiaoyu Yan, Eric Tang, Jonathan, Balkind, C. Batten, D. Wentzlaff

2022

A CMOS-based Characterisation Platform for Emerging RRAM Technologies

A. Mifsud, Jiawei Shen, Peilong Feng, L. Xie, Chao-Hsiang Wang, Yihan Pan, S. Maheshwari, Shady O. Agwa, S. Stathopoulos, Shiwei Wang, Alexander Serb, C. Papavassiliou, T. Prodromakis, T. Constandinou

International Symposium on Circuits and Systems, 2022

High-Density Digital RRAM-based Memory with Bit-line Compute Capability

Shady O. Agwa, Yihan Pan, Thomas Abbey, Alexander Serb, T. Prodromakis

International Symposium on Circuits and Systems, 2022

Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM

O. Afuye, Shady Agwa, C. Batten, A. Apsel

European Solid-State Device Research Conference, 2021

Implementing Low-Diameter On-Chip Networks for Manycore Processors Using a Tiled Physical Design Methodology

Yanghui Ou, Shady Agwa, C. Batten

ACM/IEEE International Symposium on Networks-on-Chips, 2020

Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM

Khalid Al-Hawaj, O. Afuye, Shady Agwa, A. Apsel, C. Batten

International Symposium on Circuits and Systems, 2020

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Cheng Tan, Yanghui Ou, Shunning Jiang, Peitian Pan, Christopher Torng, Shady Agwa, C. Batten

ICCD, 2019

A Low Power Self-healing Resilient Microarchitecture for PVT Variability Mitigation

Shady O. Agwa, Eslam Yahya, Y. Ismail

IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2018

Power efficient resilient microarchitectures for PVT variability mitigation

Shady O. Agwa

2018

Power efficient AES core for IoT constrained devices implemented in 130nm CMOS

Shady O. Agwa, Eslam Yahya, Y. Ismail

International Symposium on Circuits and Systems, 2017

ERSUT: A Self-Healing Architecture for Mitigating PVT Variations Without Pipeline Flushing

Shady O. Agwa, Eslam Yahya, Y. Ismail

IEEE Transactions on Circuits and Systems - II - Express Briefs, 2016

Design techniques for variability mitigation

Shady O. Agwa, Eslam Yahya, Y. Ismail

2013

Variability mitigation using correction function technique

Shady O. Agwa, Eslam Yahya, Y. Ismail

International Conference on Electronics, Circuits, and Systems, 2013

Hardware Pessimistic Run-Time Profiling for a Self-Reconfigurable Embedded Processor Architecture

Shady O. Agwa, Hany H. Ahmad, A. I. Saleh

International Conference on Reconfigurable Computing and FPGAs, 2010

Towards a self-reconfigurable embedded processor architecture

Shady O. Agwa, Hany H. Ahmad, A. I. Saleh

International Conference on Communication and Electronics Systems, 2009