Shady Agwa

Research Fellow

L-Sort: On-chip Spike Sorting with Efficient Median-of-Median Detection and Localization-based Clustering


Journal article


Yuntao Han, Yihan Pan, Xiongfei Jiang, Cristian Sestito, Shady O. Agwa, T. Prodromakis, Shiwei Wang
2025

Semantic Scholar ArXiv
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Cite

APA   Click to copy
Han, Y., Pan, Y., Jiang, X., Sestito, C., Agwa, S. O., Prodromakis, T., & Wang, S. (2025). L-Sort: On-chip Spike Sorting with Efficient Median-of-Median Detection and Localization-based Clustering.


Chicago/Turabian   Click to copy
Han, Yuntao, Yihan Pan, Xiongfei Jiang, Cristian Sestito, Shady O. Agwa, T. Prodromakis, and Shiwei Wang. “L-Sort: On-Chip Spike Sorting with Efficient Median-of-Median Detection and Localization-Based Clustering” (2025).


MLA   Click to copy
Han, Yuntao, et al. L-Sort: On-Chip Spike Sorting with Efficient Median-of-Median Detection and Localization-Based Clustering. 2025.


BibTeX   Click to copy

@article{yuntao2025a,
  title = {L-Sort: On-chip Spike Sorting with Efficient Median-of-Median Detection and Localization-based Clustering},
  year = {2025},
  author = {Han, Yuntao and Pan, Yihan and Jiang, Xiongfei and Sestito, Cristian and Agwa, Shady O. and Prodromakis, T. and Wang, Shiwei}
}

Abstract

Spike sorting is a critical process for decoding large-scale neural activity from extracellular recordings. The advancement of neural probes facilitates the recording of a high number of neurons with an increase in channel counts, arising a higher data volume and challenging the current on-chip spike sorters. This paper introduces L-Sort, a novel on-chip spike sorting solution featuring median-of-median spike detection and localization-based clustering. By combining the median-of-median approximation and the proposed incremental median calculation scheme, our detection module achieves a reduction in memory consumption. Moreover, the localization-based clustering utilizes geometric features instead of morphological features, thus eliminating the memory-consuming buffer for containing the spike waveform during feature extraction. Evaluation using Neuropixels datasets demonstrates that L-Sort achieves competitive sorting accuracy with reduced hardware resource consumption. Implementations on FPGA and ASIC (180 nm technology) demonstrate significant improvements in area and power efficiency compared to state-of-the-art designs while maintaining comparable accuracy. If normalized to 22 nm technology, our design can achieve roughly $\times 10$ area and power efficiency with similar accuracy, compared with the state-of-the-art design evaluated with the same dataset. Therefore, L-Sort is a promising solution for real-time, high-channel-count neural processing in implantable devices.